Software Design Coupling/Cohesion in Software Engineering

Software Design

• Software design is a creative process, just like designing anything else
  
• To see a wrong design, we can check with the requirements in the analysis model
  
• To see a bad design, we need to assess the design model and analyse the components, whether the performance can be improved by changing the modules or the interfaces

         In Analysing the software Design many factors are used, such as Coupling, Cohesion, Factoring, System Shape, etc.

 Coupling

• The degree of interdependence between two modules”
  
• We aim to minimise coupling - to make modules as independent as possible
  ​Low coupling can be achieve by:
• eliminating unnecessary relationships
• reducing the number of necessary relationships
• easeing the ‘tightness’ of necessary relationships

Types of Coupling

• Data coupling       (Most Required)   
                             
• Stamp coupling
   
• Control coupling
   
• Hybrid coupling
   
• Common coupling
   
• Content coupling  (Least Required)

Data Coupling 

• Modules communicate by parameters
   
• Each parameter is an elementary piece of data
   
• Each parameter is necessary to the communication
   
• Nothing extra is needed

Data coupling problems

• Too many parameters - makes the interface difficult to understand and possible error to occur
   
• Tramp data - data ‘traveling’ across modules before being used

Stamp coupling

• A composite data is passed between modules
   
• Internal structure contains data not used
   
• Bundling - grouping of unrelated data into an artificial structure

Control coupling

• A module controls the logic of another module through the parameter
   
• Controlling module needs to know how the other module works - not flexible!

Hybrid coupling

• A subset of data used as control
   
• Example: account numbers 00001 to 99999
  ​
• If 90000 - 90999, send mail to area code of last 3 digit (000 - 999)

Common coupling

• Use of global data as communication between modules
   
• Dangers of
• ripple effect
   
• inflexibility
   
• difficult to understand the use of data

Content coupling

• A module refers to the inside of another module
   
• Branch into another module
   
• Refers to data within another module
   
• Changes the internal workings of another module
   
• Mostly by low-level languages

 

Cohesion

• “The measure of the strength of functional relatedness of elements within a module”
   
• Elements: instructions, groups of instructions, data definition, call of another module
                                                                                                 ​
• We aim for strongly cohesive modules
  ​
• Everything in module should be related to one another - focus on the task
   
• Strong cohesion will reduce relations between modules - minimise coupling

      Types of Cohesion

• Functional cohesion (Most Required)
   
• Sequential cohesion
   
• Communicational cohesion
   
• Procedural cohesion
   
• Temporal cohesion
   
• Logical cohesion
   
• Coincidental cohesion (Least Required)

Functional cohesion

• All elements contribute to the execution of one and only one problem-related task
   
• Focussed - strong, single-minded purpose
   
• No elements doing unrelated activities
  ​
• Examples of functional cohesive modules:
• Compute cosine of angle
   
• Read transaction record
   
• Assign seat to airline passenger

Sequential cohesion

• Elements are involved in activities such that output data from one activity becomes input data to the next
   
• Usually has good coupling and is easily maintained
   
• Not so readily reusable because activities that will not in general be useful together
   
• Example of Sequential Cohesion
   
• module format and cross-validate record
   
•    use raw record
   
•     format raw record
   
•    cross-validate fields in raw record
   
•    return formatted cross-validated record

                 end module

Communicational Cohesion

• Elements contribute to activities that use the same input or output data
   
• Not flexible, for example, if we need to focus on some activities and not the others
   
• Possible links that cause activities to affect each other
   
• Better to split to functional cohesive ones
   
• Example of Communicational Cohesion
   
• module determine customer details
   
•    use customer account no
   
•    find customer name
   
•    find customer loan balance
   
•    return customer name, loan balance

end module

 

Procedural cohesion

• Elements are related only by sequence, otherwise the activities are unrelated
   
• Similar to sequential cohesion, except for the fact that elements are unrelated
   
• Commonly found at the top of hierarchy, such as the main program module
   
• Example of Procedural Cohesion
• module write read and edit something
•    use out record
   
•    write out record
   
•    read in record
   
•    pad numeric fields with zeros
   
•    return in record

         end module

Temporal cohesion

• Elements are involved in activities that are related in time
   
• Commonly found in initialisation and termination modules
   
• Elements are basically unrelated, so the module will be difficult to reuse
   
• Good practice is to initialise as late as possible and terminate as early as possible
   
• Example of Temporal Cohesion
• module initialise
•    set counter to 0
   
•    open student file 
   
•    clear error message variable
   
•    initialise array

       end module

 

Logical cohesion

• Elements contribute to activities of the same general category (type)
   
• For example, a report module, display module or I/O module
   
• Usually have control coupling, since one of the activities will be selected
   
• Example of Logical Cohesion
• module display record

      use record-type, record

      if record-type is student then

             display student record

      else if record-type is staff then

             display staff record

end module

 

Coincidental cohesion

• Elements contribute to activities with no meaningful relationship to one another
   
• Similar to logical cohesion, except the activities may not even be the same type
   
• Mixture of activities - like ‘rojak’!
   
• Difficult to understand and maintain, with strong possibilities of causing ‘side effects’ every time the module is modified
• Example of Coincidental Cohesion

module miscellaneous functions

   use customer record

   display customer record

   calculate total sales

   read transaction record

   return transaction record

end module

 

Determining Module Cohesion

 

 

Other Design Factors to Consider

• Factoring: reduce module size, clarifying system,minimise duplication of code, separating work from management, creating useful modules, simplifying
   
• System Shape (Structure)
   
• Redundancy
   
• Fan-in/Fan-out
   
• Restrictivity/Generality

Brilliant Tutorials GATE Study Materials

Following are four sets of study materials:

http://www.ziddu.com/download/10763952/GATEMETIRAL2010CSESET-1.pdf.html

http://www.ziddu.com/download/10764869/GATEMETIRAL2010CSESET-2.pdf.html
http://www.ziddu.com/download/10765323/GATEMETIRAL2010CSESET-3.pdf.html
http://www.ziddu.com/download/10767260/GATEMETIRAL2010CSESET-5.pdf.html
http://www.ziddu.com/download/8226589/GateCSFull.rar.html

Multiply Using Booth’s Algorithm

 

In this tutorial, I will discuss how to multiply two numbers using Booth’s algorithm. We will use the 

following problem as our example: 

Calculate 5 x -3 using four bit numbers and Booth's algorithm. Show all steps neatly in a 

table. 

First, convert both numbers to binary. 

5 = 0101 

-3 = 1101 

We see that if we add 0 to the right of both binary conversions, there are four 0 to 1 or 1 to 0 

switches in 0101, and only three switches in 1101. Since three is the smaller of the two, we use 

1101 as our x value and use 0101 as out y value. The next step is to find the two's compliment of 

our y value so that we can do subtraction of y from x. We do this by keeping all 0's up until, and 

including, the first 1 the same. We then flip all the remaining bits. So two's compliment of 0101 

becomes 1011. 

The next step is to set two registers, which we name u and v, to be zero. These are going to be the 

registers where we store our product throughout the working of the problem. We then place these 

registers into a table along with two additional registers x and x-1. Register x is initially set to be the 

predetermined value of x, and x-1 is initially set to be zero. 

 u          v       x    x-1 

0000 0000 1101 0 

The next step is to look at the LSB of x and the number in the x-1 register. If the LSB of x is one, and 

x-1 is zero, we subtract y from u. If LSB of x is zero, and x-1 is 1, then we add y to u. If both LSB of 

x and x-1 are equal, you do nothing and skip to the shifting stage. In our case, the LSB of x is one, 

and x-1 is zero, so we subtract y from u. We then do an arithmetic right shift on u and v, and a 

circular right shift on x, also copying the LSB of x into x-1. This gives the table: 

 u          v       x    x-1 

0000 0000 1101 0 

1011 

1011 

1101 1000 1110 1 

We then go through the process again using the same rules. This time we see that the LSB of x is 

0 and x-1 is 1. We must now add y to u. Once added, we then do an arithmetic right shift on u and 

v, with the last bit of v dropping off, and a circular right shift on x, also copying the LSB of x into x-1. 

This gives the table: 

 u          v       x    x-1 

0000 0000 1101 0 

1011 

1011  

1101 1000 1110 1 

0101 

0010 

0001 0100 0111 0 

Again, we repeat the process again. This time LSB of x is 1 and x-1 is zero. So like we did on the 

first pass, we subtract y from u. We then do an arithmetic right shift on u and v, and a circular right 

shift on x, also copying the LSB of x into x-1. This gives the table: 

 u          v       x    x-1 

0000 0000 1101 0 

1011 

1011 

1101 1000 1110 1 

0101 

0010 

0001 0100 0111 0 

1011 

1100 

1110 0010 1011 1 

Now on the fourth and final pass, we see that the LSB of x is 1 and so is x-1. This makes it easier 

for us because now we don't have to add the numbers. We only have to do an arithmetic right shift 

on u and v, and a circular right shift on x, also copying the LSB of x into x-1. This gives the table: 

 u          v       x    x-1 

0000 0000 1101 0 

1011 

1011 

1101 1000 1110 1 

0101 

0010 

0001 0100 0111 0 

1011 

1100 

1110 0010 1011 1 

1111 0001 1101 1 

And we are finished. The result is u followed by v, and we get 11110001. Now to easily check our 

calculations, we take the original question, 5 x -3. This becomes -15. -15 is the two's compliment of 

15. 15 in eight bit binary is 00001111. Taking the two's compliment by the method previously 

described, we get the result 11110001, which is exactly the same as our Booths algorithm answer. 

Virtual Memory Exercise

Problem 1. Consider a virtual memory system that uses a single-level page map to translate virtual addresses into physical addresses. Each of the questions below asks you to consider what happens when one of the design parameters of the original system is changed.

1. If the physical memory size (in bytes) is doubled, how does the number of bits in each entry of the page table change?

increases by 1 bit. Assuming the page size remains the same, there are now twice as many physical pages, so the physical page number needs to expand by 1 bit.

2. If the physical memory size (in bytes) is doubled, how does the number of entries in the page map change?

no change. The number of entries in the page table is determined by the size of the virtual address and the size of a page -- it's not affected by the size of physical memory.

3. If the virtual memory size (in bytes) is doubled, how does the number of bits in each entry of the page table change?

no change. The number of bits in a page table entry is determined by the number of control bits (usually 2: dirty and resident) and the number of physical pages -- the size of each entry is not affected by the size of virtual memory.

4. If the virtual memory size (in bytes) is doubled, how does the number of entries in the page map change?

the number of entries doubles. Assuming the page size remains the same, there are now twice as many virtual pages and so there needs to be twice as many entries in the page map.

5. If the page size (in bytes) is doubled, how does the number of bits in each entry of the page table change?

each entry is one bit smaller. Doubling the page size while maintaining the size of physical memory means there are half as many physical pages as before. So the size of the physical page number field decreases by one bit.

6. If the page size (in bytes) is doubled, how does the number of entries in the page map change?

there are half as many entries. Doubling the page size while maintaining the size of virtual memory means there are half as many virtual pages as before. So the number of page table entries is also cut in half.

7. The following table shows the first 8 entries in the page map. Recall that the valid bit is 1 if the page is resident in physical memory and 0 if the page is on disk or hasn't been allocated.

   Virtual page	Valid bit	Physical page
   0	0	7
   1	1	9
   2	0	3
   3	1	2
   4	1	5
   5	0	5
   6	0	4
   7	1	1

   If there are 1024 (2¹⁰) bytes per page, what is the physical address corresponding to the decimal virtual address 3956?

3956 = 0xF74. So the virtual page number is 3 with a page offset of 0x374. Looking up page table entry for virtual page 3, we see that the page is resident in memory (valid bit = 1) and lives in physical page 2. So the corresponding physical address is (2<<10)+0x374 = 0xB74 = 2932.

__________________________________________________________________________________________

Problem 2. A particular 32-bit microprocessor includes support for paged virtual memory addressing with 2¹² byte pages. The mapping of virtual to physical addresses requires two translation steps:

1. The most significant 10 bits of the virtual address (the Dir field) are multiplied by 4 and appended to the 20 most significant bits of the dirbase (directory base) register to get the address in main memory of a page directory entry. Each entry in the page directory is a 32-bit record composed of a 20-bit PTBL field and various control bits (Present, Dirty, Read-only, etc.).
2. The bits of the Page field (virtual address bits 21 to 12) are multiplied by 4 and appended to the PTBL field to form the page-table address. This page table address references a 32-bit page table entry. Each page table entry is composed of a 20-bit physical page number (PPN) and a series of control bits.

All page-table entries and the page directory are stored in main memory. The results of these translations are cached in a 4-way set-associative translation look-aside buffer (TLB) with a total of 64 entries, and a LRU replacement strategy is used on TLB misses.

1. Given a computer system with 2²⁷ bytes of physical memory that uses the virtual-to-physical address translation scheme described, how many pages of physical memory are there?

2¹⁵ = 2²⁷/2¹² = the size of physical memory divided by the size of each page.

2. How many memory pages does the Page Directory occupy?

We are told that the Page Directory index is 10 bits, implying 2¹⁰ = 1024 entries. Each entry occupies 4 bytes, so the total size of the of the Page Directory is 4*2¹⁰ = 2¹² bytes, or exactly one page.

3. What is the approximate maximum size for a process's working set that still achieves a 100% TLB hit rate?

The TLB has 64 entries, so to achieve 100% hit rate in the TLB we can access only 64 different pages as part of our working set. 64 pages = 64*2¹² = 2¹⁸ bytes.

4. Which virtual address bits would most likely be used to select which set to access in the TLB cache?

We would like adjacent virtual pages to be able to mapped by the TLB, so we'd like them to occupy different sets in the cache. This is achieved by using the low-order 4 bits of the virtual page number as the TLB index, i.e., bits 12 through 15 of the address. Remember that the TLB is 4-way associative, so each subcache has 64/4 = 16 entries.

5. How large must the tag field of the TLB be?

The tag field should contain all the bits of the virtual page number not used to form the index, i.e., bits 16 through 31, a total of 16 bits.

6. A control bit, C, in each page table entry determines if memory references to that page are cacheable. In order to support this feature, which of the following statements concerning the interaction between virtual-to-physical address translations and caching must be true?
   1. The cache tags must contain physical addresses
   2. Each memory access requires a virtual-address translation to take place in parallel with the cache access
   3. The status of the cacheable bit, C, needs only to be considered on a cache miss
   4. Page table entries with their dirty bit set should clear their cacheable bit
   5. All of the above

C. We only need to worry if a page is cacheable if we're considering bringing some of its entries into the cache, and we only do this if the access can't be satisfied from current contents of the cache.

---

Problem 3. Consider two possible page-replacement strategies: LRU (the least recently used page is replaced) and FIFO (the page that has been in the memory longest is replaced). The merit of a page-replacement strategy is judged by its hit ratio.
Assume that, after space has been reserved for the page table, the interrupt service routines, and the operating-system kernel, there is only sufficient room left in the main memory for four user-program pages. Assume also that initially virtual pages 1, 2, 3, and 4 of the user program are brought into physical memory in that order.

1. For each of the two strategies, what pages will be in the memory at the end of the following sequence of virtual page accesses? Read the sequence from left to right: (6, 3, 2, 8, 4).

LRU:
start: 1 2 3 4
access 6: replace 1 => 2 3 4 6
access 3: reorder list => 2 4 6 3
access 2: reorder list => 4 6 3 2
access 8: replace 4 => 6 3 2 8
access 4: replace 6 => 3 2 8 4
FIFO:

start: 1 2 3 4
access 6: replace 1 => 2 3 4 6
access 3: no change => 2 3 4 6
access 2: no change => 2 3 4 6
access 8: replace 2 => 3 4 6 8
access 4: no change => 3 4 6 8

2. Which (if either) replacement strategy will work best when the machine accesses pages in the following (stack) order: (3, 4, 5, 6, 7, 6, 5, 4, 3, 4, 5, 6, 7, 6, ...)?

LRU misses on pages 3 & 7 => 2/8 miss rate.FIFO doesn't work well on stack accesses => 5/8 miss rate.

3. Which (if either) replacement strategy will work best when the machine accesses pages in the following (repeated sequence) order: (3, 4, 5, 6, 7, 3, 4, 5, 6, 7, ...).

Both strategies have a 100% miss rate in the steady state.

4. Which (if either) replacement strategy will work best when the machine accesses pages in a randomly selected order, such as (3, 4, 2, 8, 7, 2, 5, 6, 3, 4, 8, ...).

Neither FIFO nor LRU is guaranteed to be the better strategy in dealing with random accesses since there is no locality to the reference stream.

---

Problem 4. A paged memory with a one-level page table has the following parameters: The pages are 2^P bytes long; virtual addresses are V bits long, organized as follows:

virtual page number

offset in page

The page-table starts at physical address PTBL; and each page-table entry is a 4-byte longword, so that, given a virtual address, the relevant page-table entry can be found at PTBL + (page number)*4. Answer the following in terms of the parameters P and V:

1. How many bits long is the "offset in page" field?

It takes log₂(2^P) = P address bits to select a single byte from a page with 2^P bytes.

2. How many bits long is the "virtual page number" field?

Since there a P bits in the offset field, the remaining V-P bits are part of the virtual page number.

3. How many entries does the page table have, and what is the highest address occupied by a page-table entry?

Since the virtual page number field has V-P bits, there are 2^V-P virtual pages and each has its own entry in the page table. Each entry is 4 bytes longs, so the highest address occupied by a page table entry is PTBL + 4*(2^(V-P)-1).

4. How many pages long is the page table?

There are 2^P/4 page table entries per page and 2^V-P pages, so the page table is 2^V-P/2^P-2 = 2^V-2P+2 pages long.

5. What is the smallest value of P such that the page table fits into one page?

Using the formula from the previous question, to make the page table fit in one page, we want V-2P+2 = 0. Solving for P we get P = V/2 + 1.

6. What relationships, if any, must hold between P, V, and the size of physical memory?

Suppose physical memory contained 2^M bytes. Then

• The physical page number must fit in 30 bits since we reserve 2 bits of the 32-bits page table entry for the dirty and resident control bits. So 30 >= M - P.
• It useful to have room in memory for at least one page other than those occupied by the page map. So M > V-P+2.

---

Problem 5.

1. If virtual addresses are V bits long, physical addresses are A bits long, the page size is 2^P bytes, and a one-level page table is used, give an expression for the size of the page table.

There are 2^V-P pages and the page table entry for each page contains a physical page number (A-P bits), a dirty bit (1 bit) and a resident bit (1 bit). So the page table occupies 2^V-P(A-P+2) bits.

---

Problem 6. Adverbs Unlimited has recently added a new product, the VIRTUALLY to the product line introduced in an earlier tutorial problem. The VIRTUALLY has a 2¹⁰-byte, two-way set-associative cache, 2²⁰ bytes of physical memory, 16-bit virtual addresses, and a 2⁶-entry page map. The VIRTUALLY will be used to support multiuser time-sharing. The page map holds the address translation for a single (current) process and must be reloaded (by the kernel) at each process switch. The cache is located between the page map and main memory.

1. What is the page size?

page size in bytes = size of virtual address divided by number of entries in the page map = 2¹⁶/2⁶ = 2¹⁰ bytes per page.

2. Which virtual address lines are used to form the index to the page map?

The virtual page number is used as the index to the page map. The virtual page number includes all virtual address bits that aren't part of the page offset. Since there 2¹⁰ bytes per page, the page offset requires 10 bits, i.e., address bits 0 through 9. The remaining six bits (bits 10 through 15) form the virtual page number.

3. Can the cache and page-map be read simultaneously? Explain in a single sentence.

Yes since the virtual page number (bits 10 through 15) doesn't overlap with the cache index/block index (bits 0 through 8 remembering that the cache is 2-way set associative).

4. Under what circumstances, if any, must the cache be invalidated (that is, its entries marked as invalid)?

Since the cache is located after the page map, it caches physical addresses. So it must be invalidated when there is a page replacement due to a page fault, since this operation changes the contents of physical memory.

---

Problem 7.

1. Program A consists of 1000 consecutive ADD instructions, while program B consists of a loop that executes a single ADD instruction 1000 times. You run both programs on a certain machine and find that program B consistently executes faster. Give two plausible explanations.

Explanation #1: one would expect the loop to achieve a higher hit rate in the cache since it involves many fewer instruction words.Explanation #2: the loop, occupying many fewer instruction words, should all fit onto a single page. The 1000 instructions might span several pages and hence their execution may involve some page faults.

2. If a TLB is implemented as a set-associative cache, how would you recommend determining the TLB slots examined when mapping the virtual address VA[31:0]? Why?

We should use the low-order bits of the virtual page number as the index into the TLB so that adjacent pages can be mapped by the TLB without collisions.

 

Solving 2-SAT in linear time

2-Satisfiability (2-SAT) is the problem of determining whether a collection of boolean variables with constraints on pairs of variables can be assigned values satisfying all the constraints. Although 3-SAT is NP complete, 2-SAT can be solved in linear time.

A 2-SAT instance can be described using 2-CNF as follows:
(x₀ OR x₁) AND (~x₀ OR x₂) AND (~x₁ OR ~x₂)
The 2-SAT problem is to find a truth assignment to these variables that makes a formula of this type true: we must choose whether to make each of the variables true or false, so that every clause has at least one term that becomes true.
Aspvall, Plass & Tarjan (1979) found a simple linear time procedure for solving 2-SAT instances, based on the notion of strongly connected components. The algorithm is as follows:

1. Create the inference graph G such that for each variable x_i in the 2-SAT instance, x_i and ~x_i are vertices of the inference graph. x_i and ~x_i are complements of each other.
2. For each clause (u OR v), add the edges ~u -> v and ~v -> u to the inference graph G.
3. Process the strongly connected components S of G in reverse topological order as follows: If S is marked, do nothing. If S = ~S (i.e., a variable and its complement belong to the same SCC), then stop, the instance is unsatisfiable. Otherwise, mark S true and ~S false.
4. We get a satisfying assignment by assigning to each variable the truth value of the component containing it.

Take a look at the C++ implementation.

how to create iso image from DVD Using UBUNTU

Insert the CD or DVD that you want to make an ISO image of, and open a terminal window. To do that, just press Ctrl+Alt+T on your keyboard to open Terminal. When it opens, run the command(s) below:

sudo cat /dev/srx > /home/<user_name>/<file_name.iso>

Make sure that you replace (x) with your device number.
for example in my case I would do:

sudo cat /dev/sr0 > /home/aryan/image.iso

ANDROID DEVELOPMENT ENVIRONMENT

SETUP ANDROID DEVELOPMENT ENVIRONMENT
WHAT WE NEED
1- JDK 6(Java Development Kit) NOTE: you will need to sign in the oracle site for this version of java unfortunately )
2- GNU Make (Optional)
3- Python 2.7
4- Git 1.7
5- Android SDK
6- Some more packages

INSTALLATION

JDK

Installing the JDK is pretty tricky and stressful every time
First, download the JDK 6, which you can download here. Download the .bin file! (in this case my JDK has been downloaded in the ~/Download folder and my file is named jdk-6u45-linux-x64.bin)
Open up your terminal and type

Code:

$ sudo mkdir /usr/lib/jvm
$ cd ~/Downloads/
$ chmod +x jdk-6u45-linux-x64.bin
$ ./jdk-6u45-linux-x64.bin
$ sudo mv jdk1.6.0_45 /usr/lib/jvm/
$ sudo update-alternatives --install /usr/bin/javac javac /usr/lib/jvm/jdk1.6.0_45/bin/javac 1
$ sudo update-alternatives --install /usr/bin/java java /usr/lib/jvm/jdk1.6.0_45/bin/java 1
$ sudo update-alternatives --install /usr/bin/jar jar /usr/lib/jvm/jdk1.6.0_45/bin/jar 1
$ sudo update-alternatives --install /usr/bin/javaws javaws /usr/lib/jvm/jdk1.6.0_45/bin/javaws 1
$ java -version

Ok, if you did everything fine you should now have the JDK installed correctly

GIT

This is the easiest one

Code:

$ sudo apt-get install git
$ y

PYTHON

Download the 2.7.5 version or newer here

Code:

$ cd ~/Downloads/
$ tar -xzvf Python-2.7.5.tgz
$ cd Python-2.7.5/
$ ./configure
$ make
$ sudo make altinstall

GNU

You don't need this step, do this just if you want the latest version of GNU Make
Download the latest version here

Code:

$ cd ~/Downloads/
$ tar -zxvf make-3.82.tar.gz
$ cd make-3.82
$ ./configure
$ make
$ sudo make install

OTHER PACKAGES

These packages are needed to run many many android commands such as ADB and FASTBOOT (only 64-bit needs this)

Code:

$ sudo apt-get install ia32-libs
or  $ sudo apt-get install libc6:i386 libgcc1:i386 gcc-4.6-base:i386 libstdc++5:i386 libstdc++6:i386

This will take about 20 mins especially if you have a slow processor or internet connection so relax and have a coffee

ANDROID SDK

This will be your best friend from now on
Download it here > download for other platforms > download the sdk tools only
Ok now i always create a Development folder where i put all the android development stuff (you can do whatever you think here)

Code:

$ mkdir ~/development
$ cd ~/Downloads
$ tar -zxvf android-sdk_r22.0.1-linux.tgz
$ mv ~/Downloads/android-sdk-linux ~/development/

Now you're ready to run the Android SDK

SETUP ADB/FASTBOOT

Open up the Android SDK by running this command

Code:

$ cd ~/development/android-sdk-linux/tools
$ ./android

At this point the SDK should come up and you will need to download at least all the tools and all the extras files, so select them and install'em.
When it finishes downloading everything you have to run this commands in another terminal

Code:

$ sudo gedit .bashrc

And you need to add at the end of it your SDK paths

Code:

#Android PATHS
export PATH=$PATH:~/development/android-sdk-linux/tools
export PATH=$PATH:~/development/android-sdk-linux/platform-tools

If you followed everything now adb and fastboot should work!
to check this you need to close all the terminals opened, reopen one and simply type

Code:

$ adb
$ fastboot

You should get a long list of possible commands if so you're done!

FIXING NO PERMISSIONS ERROR

Probably, if you run

Code:

$ adb devices
or 
$ fastboot devices

right now you'll get a strange output, something like this

Code:

???????? No permissions

In order to avoid this message we have to create a simple file

Code:

$ cd /tmp/
$ touch android.rules
$ nano android.rules

Now you have to paste this lines in that file and save it

Code:

SUBSYSTEM=="usb", ATTRS{idVendor}=="0bb4", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0e79", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0502", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0b05", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="413c", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0489", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="091e", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="18d1", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0bb4", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="12d1", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="24e3", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="2116", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0482", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="17ef", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="1004", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="22b8", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0409", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="2080", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0955", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="2257", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="10a9", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="1d4d", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0471", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="04da", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="05c6", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="1f53", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="04e8", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="04dd", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0fce", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="0930", MODE="0666"
SUBSYSTEM=="usb", ATTRS{idVendor}=="19d2", MODE="0666

Now you have to set the right permissions to this file, just type

Code:

$ sudo cp /tmp/android.rules /etc/udev/rules.d/51-android.rules
$ sudo chmod 644   /etc/udev/rules.d/51-android.rules
$ sudo chown root. /etc/udev/rules.d/51-android.rules
$ sudo service udev restart
$ sudo killall adb

SUGGESTED PROGRAMS

ECLIPSE

In the Android world you don't want to miss the Eclipse IDE which is the most used one! This tool will help you developing/making android apps
You can download it here (download the classic one)

Code:

$ cd ~/Downloads
$ tar -zxvf eclipse-SDK-4.2.2-linux-gtk-x86_64.tar.gz
$ mv ~/Downloads/eclipse ~/development/

SETUP INFO


NOTE: If you download the entire ADT bundle provided by google you will get the SDK and Eclipse IDE together

ANDROID STUDIO

This is the new development IDE made in Google, personally i love it!
You can download it from here
It has a lot of new features that Eclipse doesn't have and it could be useful in some cases

Code:

$ cd ~/Downloads
$ tar -zxvf android-studio-bundle-130.687321-linux.tgz
$ mv ~/Downloads/android-studio ~/development/

To run it you just need to navigate to its bin folder and type

Code:

$ ./studio.sh